The present invention relates to a data processing technology, and in particular, to a technology effectively applicable to an instruction system in a program controlled system, for example, to an instruction system of a microprocessor having at least two register sets.
In the past, in some microcomputers of the Z80 type (Zylog), as shown in FIG. 7, two register sets RSA and RSB are provided so that a task processing can be achieved by use of one of these register sets. According to this operation, for example, when a task is completed by use of the register set RSA, control can be immediately passed to another task processing by changing from the register set RSA to the register set RSB with the contents of the registers remaining unchanged. To return control to the original task when the task processing is completed, the register set is changed to the register set RSA, which enables use of the remaining contents of the registers associated with the original task to be executed. Consequently, this method has the advantages that certain operations, such as an operation to save registers, are not necessary when a task is changed and that a high execution speed can be developed.
However, there exist some cases where an argument is required to be transferred to execute a new processing when control is passed from one task processing to another task processing. As shown in FIG. 7, if the system is so controlled to completely change the register set, there arises a disadvanage that the argument cannot be easily transferred.
In contrast, the reduced instruction set computer (RISC) produced by the UC at Berkeley is provided with a plurality of register sets RSA, RSB, RSC, etc. in which a fixed number of registers in the respective sets overlaps, as shown in FIG. 8. As a result, operations, such as a transfer of arguments, can be easily accomplished when control jumps to a subroutine. However, when a plurality of register sets in the respective groups overlap with each other, the overlapping registers cannot be used in a case where such operations as a transfer of arguments is not required when a task change takes place, which therefore leads to a disadvantage that the available number of registers is limited.